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Lightmatter Unveils 3D Co-Packaged Optics for 256 Tbps in One Package

MOUNTAIN VIEW, Calif. — Lightmatter unveiled two new optical interconnect technologies that mean large multi-die chiplet designs are no longer limited by the amount of beachfront each chiplet has for I/O. These technologies enable up to 256 Tbps of I/O from a single package.

“Basically, this is the endgame for all the optics stuff, it’s checkmate,” Lightmatter CEO Nick Harris told EE Times.

Large multi-chiplet designs for data center AI are currently limited by the amount of information that can go in and out of the chiplets, which in turn is limited by the available beachfront—the length of the edge of the chiplets where they can be connected to other chiplets in the same package or out to other parts of the system via copper wires.

The L200 and L200X are three-dimensional technologies for co-packaged optics, which will enable XPU (processor, accelerator or GPU) designs with 256 Tbps of I/O, Harris said.

“Every single AI chip company will have four full-reticle compute die with six HBMs on each side,” he said. “How do you differentiate yourself?”

In Lightmatter’s L200 tech, I/O chiplets from Alphawave are designed to sit next to the customer’s XPU silicon, but communication goes vertically downward into Lightmatter’s Passage active optical interposer. This eliminates any reliance on beachfront for I/O; Alphawave’s chiplet is a 2D array of 320 Serdes blocks (Alphawave will offer corresponding I/O IP for XPUs royalty-free).

Lightmatter's L200 module
Lightmatter’s L200 module, showing Alphawave Serdes chiplet on Lightmatter Passage optical interposer with fibers connected (Source: Lightmatter)

I/O and XPU chiplets are mounted on the Passage interposer using a standard chip-on-wafer process and they communicate using the UCIe protocol (no software changes are required). Through-silicon vias deliver power through the Passage interposer from the board below to the XPU above.

The L200 has a 32 Tbps optical engine (transmit and receive), while the L200X has a 64 Tbps engine. This is an order of magnitude better than what pluggable optics can do, at lower cost and lower power, Harris said. Each 64 Tbps is 18× faster than the current generation of NVLink. For the L200/200X, each fiber can offer 1.6 Tbps (based on 112 Gbps per wavelength, with 16 wavelengths). This is twice as fast, per fiber, as today’s pluggables, Harris said. Four I/O chiplets per package with the 64 Tbps version means a total of 256 Tbps of bandwidth into each package.   

“We are integrating with people’s chips now,” Harris said, noting that full availability of L200 and L200X will come in 2026.

Photonic superchip

Lightmatter also unveiled Passage M1000—a reference platform for what the company calls a photonic superchip. Also based on Lightmatter’s Passage active optical interposer technology, which uses solid-state optical switching in its programmable waveguide network, M1000 enables 114 Tbps total optical bandwidth while allowing up to 1.5 kW power delivery per package.

“If you tried to do this with [other co-packaged optics technologies], the package would be huge because they have to put all the optical modules around the outside,” Harris said. “This is the minimum-sized package you can build to get that bandwidth—the theoretical limit.”

A rendering of a Lightmatter-enabled photonic superchip (Source: Liger)

Near-package or on-package optics’ physical size can cause problems with heat dissipation, Harris added.

Two-hundred and fifty six optical fibres can be edge-attached to Passage with 448 Gbps bandwidth per fiber. Lightmatter aims to enable the biggest multi-reticle ASICs by enabling designs with up to 4,000mm2 of silicon in a single package. A single scale-up domain can be expanded to up to 2,000 XPUs.

As with the L200 and L200X, the idea is to remove the dependence on beachfront for I/O in large multi-die systems, expanding a single scale-up domain to 2,000 GPUs. Designs with more than four compute chiplets are restricted by beachfront for I/O; dies then have to communicate through each using the NoCs on each chiplet. With Passage M-series, Serdes can be anywhere on the chip.

“There is no concept of shoreline, at all, it has no beachfront, it goes down and out,” Harris said. “This is impossible with any other technology.”

Lightmatter has partnered with packaging houses ASE and Amkor for assembly of customer chips onto the Passage interposer.

Passage M1000 will be available in summer 2025.




From EETimes

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