Chiplets are trendy, but not everyone is in a position to get on the bandwagon due to expertise and financial constraints. Efforts are underway, however, to democratize the technology to make chiplet tech more broadly accessible.
A recent update to the Arm Total Design initiative centers on expanding the chiplet ecosystem. A year after it was announced, Arm, Samsung Foundry, ADTechnology and Rebellions have partnered to launch an AI/CPU chiplet platform that targets the cloud, high-performance computing (HPC), and AI/ML training and inference workloads.
The initiative is part of the company’s broader aim to accelerate the development of custom silicon and create the hardware foundation for a sustainable AI datacenter, which includes innovation around chiplet technology.
Arm-based chiplets now include those from Alcor Micro, which is powered by Arm’s Compute Sub System (CSS) and targets AI/ML training and inference use-cases, while Alphawave’s advanced compute chiplet is built on CSS for AI/ML, HPC, datacenter and 5G/6G applications.
The Arm Total Design collective of companies includes those with EDA tools, design expertise, foundry support, and firmware and higher-level software to sit atop designs. In an interview with EE Times, Eddie Ramirez, VP of Arm’s infrastructure business, said Arm Total Design now has 29 ecosystem partners since it launched at the OCP Summit. This approach of recruiting partners reflects the reality that all chips are being done by the same design partner.
“What we really would like to see as an industry where you have options to have reusable chips between designs because that ultimately will bring the design costs down,” Ramirez said. “We need to be able to have common interfaces and we need to be able to have various IPs that are already validated together so that people can go off and build these chips that could then be interoperable.”
The UCIe Consortium released its 2.0 specification in August. Updates address design challenges for testability, manageability and debug (DFx) for the SiP lifecycle across multiple chiplets. A key feature of the update is support for 3D packaging to enable chiplets to dramatically increase bandwidth density and power efficiency.
Arm has been working with Intel Foundry Services, Samsung and TSMC to develop programs for chip testing and proof of concepts (PoCs) and even full products, according to Ramirez. “We’ve got now about 15 different design partners, ASIC design partners and OEMs who are working on these kinds of projects,” he said.
Ramirez added that the last piece of the puzzle is third-party IP vendors like Cadence or Alphawave that help connect chiplets together based on the UCIe interface. “We’re working with them to align our roadmap.”
He said Arm Total Design is a marquee project due to its complexity, as well as its goal to offer an alternative to Grace Hopper and other Nvidia-based GPU solutions. The recently announced chiplet platform will see Korean partner ADTechnology use Arm’s compute subsystem to build a 64-core compute chiplet. “They’re going to pair that with Rebellion’s AI accelerator and Samsung’s HBM memory into a single packaged product,” Ramirez said.
The product will offer three times better power efficiency and performance than Nvidia solutions available today, he added, and it will demonstrate that complex chiplet integration is possible.
Ramirez acknowledged even some larger Arm partners have challenges implementing complicated 3D stacking designs. “Part of the Arm Total Design program is how do we make chips viable for more partners? How do we broaden the supply base of partners who can do these kinds of designs?”
He said diversifying the chiplet ecosystem is important because AI hardware today is coming from a very narrow band of silicon companies. Rebellion is a startup that is using key technologies from Samsung Foundry, Ramirez noted, which is demonstrating that Arm can broaden the supply base for complex chiplet designs, while accelerating chiplet designs with its technologies and protocols that sit on top of the UCIe physical layer.
Ramirez said that by providing partners with nearly 70% of the entire chip design up front, Arm has enabled them to build high core count systems. “They’re getting preferential access to these compute subsystem designs from Arm.”
Ramirez said the next area of focus for chiplets is standardizing 3D stacking. “It’s good to see that 2.5D designs are getting kicked off. They’re using UCIe as a common interface.”
Chiplets are arguably still a big company’s game right now, Chuck Sobey, chief scientist at ChannelScience and general chair of the Chiplet Summit, told EE Times in an interview. Every big GPU is essentially a chiplet design, and those vendors are in the best position to go to a foundry and place a giant order and own the process.
Democratizing chiplets through standardization will enable one chiplet maker to collaborate with another to allow for mix and matching, Sobey said, allowing for innovation in areas like AI accelerators.
He sees the OCP chiplet marketplace as a key enabler to making chiplet technology and products more widely accessible.
Outside of Arm and OCP’s efforts, other ventures to enable a chiplet ecosystem include Silicon Valley startup Eliyan Corporation, which is offering a more efficient approach to packaging with its “bunch of wires” (BoW) chiplet system, and Baya Systems’ algorithm-driven system architecture platform, which pulls together all the steps of building out chiplet architectures through data-driven design.
From EETimes