TAIPEI — Taiwan Semiconductor Manufacturing Co. (TSMC) will probably make nearly all of the A10 and A11 processors for Apple this year and next because of a competitive advantage the Taiwan foundry has gained in packaging technology, according to analysts.

TSMC has been ramping its InFO (Integrated Fan Out) packaging for Apple's A10 processor used in the new iPhone 7 smartphone. InFO uses fan out wafer level packaging rather than a flip-chip substrate to provide a 20% reduction in package thickness, a 20% speed gain and 10% better thermal performance.

The commercialization of this advanced packaging technology shifts semiconductor manufacturing into the “more than Moore” era as Moore’s Law is expected to reach its physical limits at 5nm design rules. TSMC has become the first with the new focus on packaging that increases chip I/O density beyond traditional ball-grid array technology by allowing multiple chips to be combined without an intervening substrate.

“It is widely believed that this is the main reason that TSMC was able to secure nearly 100% of the allocation for Apple’s upcoming A10 chip,” according to George Chang, an analyst with Yuanta Investment Consulting in Taipei. “TSMC is unlikely to monopolize the market in the long-run, but whether others will be able to come up with a feasible solution by the first half of 2017 (before the debut of Apple’s 10nm A11), and more importantly, with an optimal production yield, has yet to be seen.”

TSMC’s InFO technology has provided a key advantage over rival Samsung, which during most of this year was a second source for the Apple processor business.

TSMC “will have a full year of 100% market share into Apple in 2017 after splitting the business through the first half of 2016,” according to an October report by Randy Abrams, an analyst with Credit Suisse in Taipei.

Poised for Takeoff
The InFO market will grow rapidly, as other companies follow Apple’s lead, according to Chang, who estimates that the market will soar to $2.3 billion in 2020 from $200 million in 2015.

Infineon developed the technology in 2008 as embedded wafer-level ball grid array (eWLB,) to cut cost and package thickness while boosting component integration. However, yield problems impeded adoption of the new technology up until TSMC’s commercialization of InFO.

In addition to TSMC and Infineon, other companies such as Freescale and Amkor also have patents on the technology, also generally known as fan out wafer-level packaging (FOWLP). Freescale and Infineon may license their patents to other assembly and test companies such as Nepes, STATSChipPAC, Nanium, and ASE, Chang said.

In the meantime, TSMC’s other tier-one customers like MediaTek and Hisilicon could become the next wave of InFO users given the lower cost and better performance, according to Chang.

As leading chipmakers move into 10nm/7nm, “we expect application processors, baseband modules and other chips for mobile devices or IoT applications to continue to adopt InFO as a key packaging solution to achieve higher integrity and smaller form factors,” Chang said.

TSMC is making steady progress and probably overcame yield barriers to successfully mass produce the technology in the third quarter of 2016, according to Mark Li, an analyst with Bernstein in Hong Kong.

“This is strategic as it marks foundry's first major entry into the IC package space,” Li said. “By 2020, nearly 50% of all smartphone/tablet processors are expected to be packaged with InFO or similar technologies.”

Companies such as Apple will be looking to expand beyond sole source TSMC in order to maintain pricing power. TSMC’s foundry and packaging competitors are likely to grab a slice of the business in the next few years.

TSMC’s share of the InFO business will slip to about 40 percent within three years from the current 100 percent, Li said.

 ----Form EE Times